power p c 6 02 microprocessor highlights control unit ? dispatches one instruction per cycle ? supports superscalar execution ? branch folding implemented ? retires up to one instruction per cycle load/store unit ? one cycle cache access ? speculative cacheable loads (for no data dependencies) integer unit ? one cycle add, subtract, shift, or rotate ? hardware multiply and divide ? 32 x 32-bit general purpose registers floating-point unit ? ieee-754 compliant single-precision operations ? 32 x 32-bit floating point registers cache unit ? separate 4k instruction and data caches, 2-way set associative ? 3-state coherency protocol ? physically addressed tag and cache arrays ? copy-back or write-thru data cache ? data coherency in hardware memory management unit ? separate 32-entry instruction and data tlbs ? separate instruction and data bats (4 each), offer protection and translation for 128k - 4mb of memory ? 32-bit powerpc architecture compliant mode ? additional protection-only-mode offers protection of up to 4mb per tlb bus interface unit ? general purpose interface for a wide range of system configurations ? multiplexed 32-bit address and 64-bit data bus ? powerful diagnostic and test interfaces through the common on-chip processor (cop) and ieee 1149.1 (jtag) interface power management unit ? static low-power design ? dynamic power management ? hardware support for power saving modes ? internal clock multiplier for operation at 2x and 3x of bus clock product description the powerpc 602* is a 32-bit implementa- tion of the powerpc* family of reduced instruction set computer (risc) micropro- cessors. it is intended for use in portable and small form factor uniprocessor applications such as pdas. it achieves its performance through concurrent execution of up to two instructions per cycle in its four parallel execution units: the fixed-point unit, floating point unit, branch processing unit, and the load/store unit. the low-power design of the powerpc 602 microprocessor, and the power management features it incorporates, offer competitive advantages in perfor- mance-oriented, power-sensitive portable applications. the powe rpc architecture* is derived from the ibm performance optimized with enhanced risc (power*) architecture. the powerpc architecture shares all the benefits of the power architecture*, but is optimized for single-chip implementation. the powerpc architecture is a major component of the poweropen* environment. the powe rpc architecture offers a complete range of processor solutions for computing needs from embedded applications through multi-processor mainframe systems. its unique combination of high performance, wide operating systems applicability, and small die size has resulted in its unprec- edented success in the risc computing market. brf602.pm6 4/8/96, 10:19 am 1
? international business machines corporation 1996 printed in the united states of america 3-96 all rights reserved * indicates a trademark or registered trademark of the international business machines corporation. ** all other products and company names are trademarks or registered trademarks of their respective holders. the information contained in this document is subject to change without notice. the products described in this document are not intended for use in implanta- tion or other life support applications where malfunction may result in injury or death to persons. the information contained in this document does not effect or change ibms product specifications or warranties. nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of ibm or third parties. all the information contained in this document was obtained in specific environments, and is presented as an illustration. the results obtained in other operating environments may vary. the information contained in this document is provided on an as is basis. in no event will ibm be liable for any damages arising directly or indirectly from any use of the information contained in this document. ibm microelectronics division 1580 route 52, bldg. 504 hopewell junction, ny 12533-6531 (800) powerpc the ibm home page can be found at: http://www.ibm.com. the ibm microelectronics division home page can be found at: http://www.chips.ibm.com. fax service 415-855-4121 !gk10-3089-01! specifications technology 0.5m cmos, four levels of metal die size 7.04mm x 7.04mm (50 mm2) number of transistors ~ 1 million temperature range (tj) 0 c to 105 c performance 40 specint92 @ 66 mhz (est.) 48 specint92 @ 80 mhz (est.) signal i/o 98 power supply 3.3 v 0.3 v power dissipation (typical) less than 1200 mw @ 66 mhz, 3.3 w packaging plastic quad flat pack (144 pins) part number ibm25emppc602-fa-066 ibm25emppc602-fa-080 brf602.pm6 4/8/96, 10:19 am 2
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